Published on: July 2026
ADVANCED NEUROMORPHIC CHIP DESIGN FOR ENERGY-EFFICIENT ARTIFICIAL INTELLIGENCE USING SPIKING NEURAL NETWORKS AND MEMRISTIVE SYNAPSES
Thotla Indupriya T Om Kumar
G Nagarjuna
Article Status
Available Documents
Abstract
Keywords— Neuromorphic Computing, Neuromorphic Chips, Spiking Neural Networks, Memristors, Artificial Intelligence Hardware, VLSI Design, Brain-Inspired Computing, Edge AI.
How to Cite this Paper
Indupriya, T. & Kumar, T. O. (2026). Advanced Neuromorphic Chip Design for Energy-Efficient Artificial Intelligence Using Spiking Neural Networks and Memristive Synapses. International Journal of Creative and Open Research in Engineering and Management, <i>02</i>(7). https://doi.org/10.55041/ijcope.v2i7.109
Indupriya, Thotla, and T Kumar. "Advanced Neuromorphic Chip Design for Energy-Efficient Artificial Intelligence Using Spiking Neural Networks and Memristive Synapses." International Journal of Creative and Open Research in Engineering and Management, vol. 02, no. 7, 2026, pp. . doi:https://doi.org/10.55041/ijcope.v2i7.109.
Indupriya, Thotla, and T Kumar. "Advanced Neuromorphic Chip Design for Energy-Efficient Artificial Intelligence Using Spiking Neural Networks and Memristive Synapses." International Journal of Creative and Open Research in Engineering and Management 02, no. 7 (2026). https://doi.org/https://doi.org/10.55041/ijcope.v2i7.109.
References
[1] C. Mead, Analog VLSI and Neural Systems, Addison-Wesley, 1989.[2] G. Indiveri and S. C. Liu, “Memory and Information Processing in Neuromorphic Systems,” Proceedings of the IEEE, vol. 103, no. 8, pp. 1379–1397.
[3] P. A. Merolla et al., “A Million Spiking-Neuron Integrated Circuit with a Scalable Communication Network and Interface,” Science, vol. 345, no. 6197, pp. 668–673.
[4] M. Davies et al., “Loihi: A Neuromorphic Manycore Processor with On-Chip Learning,” IEEE Micro, vol. 38, no. 1, pp. 82–99.
[5] S. Furber, “Large-Scale Neuromorphic Computing Systems,” Journal of Neural Engineering, vol. 13, no. 5, pp. 051001.
[6] W. Maass, “Networks of Spiking Neurons: The Third Generation of Neural Network Models,” Neural Networks, vol. 10, no. 9, pp. 1659–1671.
[7] B. Linares-Barranco and T. Serrano-Gotarredona, “Memristance Can Explain Spike-Time-Dependent Plasticity in Neural Synapses,” Nature Precedings, pp. 1–10.
[8] G. Indiveri, B. Linares-Barranco, T. Hamilton, A. Van Schaik, and R. Etienne-Cummings, “Neuromorphic Silicon Neuron Circuits,” Frontiers in Neuroscience, vol. 5, pp. 73–89.
[9] J. Schemmel, D. Brüderle, A. Grübl, M. Hock, K. Meier, and S. Millner, “A Wafer-Scale Neuromorphic Hardware System for Large-Scale Neural Modeling,” Proceedings of IEEE ISCAS, pp. 1947–1950.
[10] K. Roy, A. Jaiswal, and P. Panda, “Towards Spike-Based Machine Intelligence with Neuromorphic Computing,” Nature, vol. 575, pp. 607–617.
Ethical Compliance & Review Process
- •All submissions are screened under plagiarism detection.
- •Review follows editorial policy.
- •Authors retain copyright.
- •Peer Review Type: Double-Blind Peer Review
- •Published on: Jul 10 2026
This article is licensed under a Creative Commons Attribution-NonCommercial 4.0 International License. You are free to share and adapt this work for non-commercial purposes with proper attribution.

